The present invention relates to a phase-locked loop (PLL) circuit. More particularly, it relates to a loop filter which is used in a PLL circuit.
The PLL circuit usually has a phase comparator, a loop filter, and a voltage-controlled oscillator. An output signal of a frequency corresponding to the oscillation frequency of the voltage-controlled oscillator is supplied to the phase of the oscillator comparator to compare the phase with the phase of an input signal.
In the PLL circuit, an active RC filter is conventionally used as the loop filter. Its transfer function F(S) is given by the following equation: ##EQU1## where .tau..sub.1 =R.sub.1 .multidot.C.sub.0 and .tau..sub.2 =R.sub.2 .multidot.C.sub.0, R.sub.1 and R.sub.2 are resistors, and C.sub.0 is a capacitor used in the active RC filter.
When the PLL circuit is formed in the form of an integrated circuit and is used for a coder-decoder circuit, the resistance in the integrated circuit should be about one hundred kilohms at the most. Therefore, if R.sub.1 is set to be 2.08 kilohms and R.sub.2 to be 28.6 kilohms, capacitor C.sub.0 must have a capacitance of 10,000 pF. Capacitor C.sub.0 in the integrated circuit comprises a polycrystalline silicon first layer that serves as a first electrode, a polycrystalline silicon second layer that serves as a second electrode, and a silicon dioxide (SiO.sub.2) layer that is sandwiched therebetween and that serves as a dielectric member. To obtain a capacitance of 10,000 pF, however, capacitor C.sub.0 must be 4 to 5 mm in diameter, which diameter is very large in relation to the size of a transistor which measures several tens of microns in diameter, and defeats the purpose of constructing the circuit in the form of an integrated circuit.